1. Field of the Invention
The present invention generally relates to a film and method of fabricating the same, and more particularly, to a polysilicon layer and method of fabricating the same.
2. Description of Related Art
A display serves as a communication interface for human to acquire information from a device, and the flat panel display (FPD) is the current trend in the display market. The FPD can be classified into various types including an organic electro-luminescence display (OLED), a plasma display panel (PDP), a liquid crystal display (LCD), a light emitting diode (LED) and so on.
The above-mentioned display usually employs the thin film transistor (TFT) as the switch of the display. Generally speaking, the TFT may be classified into mainly two types including an amorphous silicon TFT and a low-temperature poly silicon thin film transistor (LTPS TFT). Compared with the conventional amorphous silicon TFT, since the electron mobility of the LTPS TFT may exceed 200 cm2/V-sec, the area of the LTPS TFT is smaller to meet the requirement of high aperture ratio.
The poly silicon layer serving as the channel layer of the LTPS TFT may be fabricated by the following methods.
1. Furnace annealing (FA) process combining with solid phase crystallization (SPC)—the disadvantage of this method lies in that the operation temperature is too high (more than 600° C.) and the required time for the thermal process is too long (more than 15 hours). Besides, when using a glass substrate, the glass substrate is likely to become deformed due to the high temperature.
2. Excimer laser crystallization (ELA) process—the disadvantage of this method lies in that the equipment is more expensive, the processing time is longer and the surface roughness of the poly silicon layer is poor.
3. Metal induced lateral crystallization (MILC) process—the disadvantage of this method lies in that the poly silicon film has metal contamination. Besides, since the individual grain size is too small, the size of the grain can only be represented by the range value.
4. Rapid energy transfer annealing (RETA) process—the disadvantage of this method lies in that the process adopts a wafer as a heating plate, and therefore this method may not be applied to the large-sized substrate.